1. Field of the Invention
The present invention relates to semiconductor memory devices, and more particularly, to volatile semiconductor memory devices that need refresh operations.
2. Description of the Related Art
Recent prevalence of handheld devices has increased the importance of low power consumption embedded DRAMs. A variety of embedded DRAMs have been developed as means to reduce the power consumption. For example, a twin-cell DRAM has two memory cells connected to the same word-line, and the memory cells store complementary data or the like, thereby improving the retention time and thus reducing the power consumption. Additionally, JPH 9-17178 proposes a twin-cell DRAM in which two memory cells hold the same data and operate the logical OR thereof or the like, thereby improving the retention time and thus reducing the power consumption.
The twin-cell DRAM has a problem, however, that switching between the single-cell configuration and the twin-cell configuration needs data compression and decompression, thus increasing the switching time and the operation time as well as requiring a dedicated circuit for the data compression and decompression, which increases the circuit area.